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s d g parameter typ. max. units r jc junction-to-case ??? 3.3 r ja case-to-ambient (pcb mount)** ??? 50 c/w r ja junction-to-ambient ??? 110 thermal resistance v dss = 30v r ds(on) = 0.045 ? i d = 23a
7/30/03 www.irf.com 1 d-pak to-252aa i-pak to-251aa logic-level gate drive ultra low on-resistance surface mount (irlr2703) straight lead (IRLU2703) advanced process technology fast switching fully avalanche rated fifth generation hexfets from international rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. this benefit, combined with the fast switching speed and ruggedized device design that hexfet power mosfets are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. the d-pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. the straight lead version (irfu series) is for through-hole mounting applications. power dissipation levels up to 1.5 watts are possible in typical surface mount applications.

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%&'(( parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 23 i d @ t c = 100c continuous drain current, v gs @ 10v 16 a i dm pulsed drain current 96 p d @t c = 25c power dissipation 45 w linear derating factor 0.30 w/c v gs gate-to-source voltage 16 v e as single pulse avalanche energy 77 mj i ar avalanche current 14 a e ar repetitive avalanche energy 4.5 mj dv/dt peak diode recovery dv/dt 5.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c

2 www.irf.com s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) ??? ??? showing the i sm pulsed source current integral reverse (body diode) ??? ??? p-n junction diode. v sd diode forward voltage ??? ??? 1.3 v t j = 25c, i s = 14a, v gs = 0v t rr reverse recovery time ??? 65 97 ns t j = 25c, i f = 14a q rr reverse recoverycharge ??? 140 210 nc di/dt = 100a/s t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) source-drain ratings and characteristics 23 96 & v dd = 15v, starting t j = 25c, l =570h r g = 25 ? , i as = 14a. (see figure 12) repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) pulse width 300s; duty cycle 2%. this is applied for i-pak, l s of d-pak is measured between lead and center of die contact. uses irl2703 data and test conditions. i sd 14a, di/dt 140a/s, v dd v (br)dss , t j 175c notes: caculated continuous current based on maximum allowable junction temperature; package limitation current = 20a. parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 30 ??? ??? v v gs = 0v, i d = 250a ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.030 ??? v/c reference to 25c, i d = 1ma ??? ??? 0.045 v gs = 10v, i d = 14a ??? ??? 0.065 v gs = 4.5v, i d = 12a v gs(th) gate threshold voltage 1.0 ??? ??? v v ds = v gs , i d = 250a g fs forward transconductance 6.4 ??? ??? s v ds = 25v, i d = 14a ??? ??? 25 a v ds = 30v, v gs = 0v ??? ??? 250 v ds = 24v, v gs = 0v, t j = 150c gate-to-source forward leakage ??? ??? 100 na v gs = 16v gate-to-source reverse leakage ??? ??? -100 v gs = -16v q g total gate charge ??? ??? 15 i d = 14a q gs gate-to-source charge ??? ??? 4.6 nc v ds = 24v q gd gate-to-drain ("miller") charge ??? ??? 9.3 v gs = 4.5v, see fig. 6 and 13 t d(on) turn-on delay time ??? 8.5 ??? v dd = 15v t r rise time ??? 140 ??? ns i d = 14a t d(off) turn-off delay time ??? 12 ??? r g = 12 ?, v gs = 4.5v t f fall time ??? 20 ??? r d = 1.0 ?, see fig. 10 between lead, 6mm (0.25in.) from package and center of die contact c iss input capacitance ??? 450 ??? v gs = 0v c oss output capacitance ??? 210 ??? pf v ds = 25v c rss reverse transfer capacitance ??? 110 ??? ? = 1.0mhz, see fig. 5 electrical characteristics @ t j = 25c (unless otherwise specified) nh i gss s d g l s internal source inductance ??? 7.5 ??? r ds(on) static drain-to-source on-resistance l d internal drain inductance ??? 4.5 ??? i dss drain-to-source leakage current ?
www.irf.com 3 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.1 1 10 100 1000 0.1 1 10 100 i , drain-to-source current (a) d v , drain-to-source voltage (v) ds a 20s pulse width t = 25c j vgs top 15v 12v 10v 8.0v 6.0v 4.0v 3.0v bottom 2.5v 2.5v 0.1 1 10 100 1000 0.1 1 10 100 i , drain-to-source current (a) d v , drain-to-source voltage (v) ds a 20s pulse width t = 175c vgs top 15v 12v 10v 8.0v 6.0v 4.0v 3.0v bottom 2.5v 2.5v j 0.1 1 10 100 2345678910 t = 25c j gs v , gate-to-source voltage (v) d i , drain-to-source current (a) t = 175c j a v = 15v 20s pulse width ds 0.0 0.5 1.0 1.5 2.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 j t , junction temperature (c) r , drain-to-source on resistance ds(on) (normalized) v = 10v gs a i = 24a d )*&
4 www.irf.com fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage

0 200 400 600 800 1000 1 10 100 c, capacitance (pf) ds v , drain-to-source voltage (v) a v = 0v, f = 1mhz c = c + c , c shorted c = c c = c + c gs iss gs gd ds rss gd oss ds gd c iss c oss c rss 0 3 6 9 12 15 048121620 q , total gate charge (nc) g v , gate-to-source voltage (v) gs a for test circuit see figure 13 v = 24v v = 15v i = 14a ds ds d 1 10 100 0.4 0.8 1.2 1.6 2.0 2.4 t = 25c j v = 0v gs v , source-to-drain voltage (v) i , reverse drain current (a) sd sd a t = 175c j 1 10 100 1000 1 10 100 v , drain-to-source voltage (v) ds i , drain current (a) operation in this area limited by r d ds(on) 10s 100s 1ms 10ms a t = 25c t = 175c single pulse c j
www.irf.com 5 fig 10a. switching time test circuit v ds 90% 10% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms +
1 0.1 % + , - . /+ + - + fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 t , rectangular pulse duration (sec) 1 thjc d = 0.50 0.01 0.02 0.05 0.10 0.20 single pulse (thermal response) a thermal response (z ) p t 2 1 t dm notes: 1. duty factor d = t / t 2. peak t = p x z + t 12 j dm thjc c 25 50 75 100 125 150 175 0 5 10 15 20 25 t , case temperature ( c) i , drain current (a) c d limited by package
6 www.irf.com q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v 0 40 80 120 160 25 50 75 100 125 150 175 j e , single pulse avalanche energy (mj) as a starting t , junction temperature (c) v = 15v i top 5.7a 9.9a bottom 14a dd d
www.irf.com 7 p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfets + 0/+"1$!12,2!
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6.73 (.265) 6.35 (.250) - a - 4 1 2 3 6.22 (.245) 5.97 (.235) - b - 3x 0.89 (.035) 0.64 (.025) 0.25 (.010) m a m b 4.57 (.180) 2.28 (.090) 2x 1.14 (.045) 0.76 (.030) 1.52 (.060) 1.15 (.045) 1.02 (.040) 1.64 (.025) 5.46 (.215) 5.21 (.205) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018) 6.45 (.245) 5.68 (.224) 0.51 (.020) min. 0.58 (.023) 0.46 (.018) lead assignments 1 - gate 2 - drain 3 - source 4 - drain 10.42 (.410) 9.40 (.370) notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 2 controlling dimension : inch. 3 conforms to jedec outline to-252aa. 4 dimensions shown are before solder dip, solder dip max. +0.16 (.006). international rectifier logo assembly lot code example : this is an irfr120 with assembly lot code 9u1p first portion of part number second portion of part number 120 irfr 9u 1p a
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6.73 (.265) 6.35 (.250) - a - 6.22 (.245) 5.97 (.235) - b - 3x 0.89 (.035) 0.64 (.025) 0.25 (.010) m a m b 2.28 (.090) 1.14 (.045) 0.76 (.030) 5.46 (.215) 5.21 (.205) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018) lead assignments 1 - gate 2 - drain 3 - source 4 - drain notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 2 controlling dimension : inch. 3 conforms to jedec outline to-252aa. 4 dimensions show n are before solder dip, solder dip max. +0.16 (.006). 9.65 (.380) 8.89 (.350) 2x 3x 2.28 (.090) 1.91 (.075) 1.52 (.060) 1.15 (.045) 4 1 2 3 6.45 (.245) 5.68 (.224) 0.58 (.023) 0.46 (.018) international rectifier logo assembly lot code first portion of part numbe r second portio n of part number 120 9u 1p example : this is an irfu120 with assembly lot code 9u1p irfu
10 www.irf.com world headquarters: 233 kansas st., el segundo, california 90245, tel: (310) 322 3331 european headquarters: hurst green, oxted, surrey rh8 9bb, uk tel: ++ 44 1883 732020 ir canada: 7321 victoria park ave., suite 201, markham, ontario l3r 2z8, tel: (905) 475 1897 ir germany: saalburgstrasse 157, 61350 bad homburg tel: ++ 49 6172 96590 ir italy: via liguria 49, 10071 borgaro, torino tel: ++ 39 11 451 0111 ir far east: k&h bldg., 2f, 30-4 nishi-ikebukuro 3-chome, toshima-ku, tokyo japan 171 tel: 81 3 3983 0086 ir southeast asia: 315 outram road, #10-02 tan boon liat building, singapore 0316 tel: 65 221 8371 http://www.irf.com/ data and specifications subject to change without notice. 7/03

tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl notes : 1. controlling dimension : millimeter. 2. all dimensions are shown in millimeters ( inches ). 3. outline conforms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inch

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